STRNADEL, Josef. Testability Analysis and Improvements of Register-Transfer Level Digital Circuits. Computing and Informatics, [S. l.], v. 25, n. 5, p. 441–464, 2012. Disponível em: http://147.213.75.17/ojs/index.php/cai/article/view/353. Acesso em: 8 nov. 2024.