Arunachalam K, Perumalsamy M, Ponnusamy KK. Fault Tolerance in Reversible Logic Circuits and Quantum Cost Optimization. Comput. Inform. [Internet]. 2021 Mar. 25 [cited 2024 Nov. 7];39(5):1099–1116. Available from: http://147.213.75.17/ojs/index.php/cai/article/view/2020_5_1099