I-Path Analysis

Abstract

In this paper a circuit at the register transfer level will be denoted as an RTL circuit. The paper describes a method for extracting the RTL circuit structure from the circuit formal description, the I-path concept is used. The way of representing the RTL circuit structure by labelled directed graph where nodes represent components and primary inputs/outputs and arcs represent connections between them is presented. Labels identifying the component type are attached to nodes, other labels are also attached to arcs to identify attributes of connections. It is shown how the graph theory algorithms can be used to derive the information about the accessibility of circuit components, i.e. the existence of I-paths between them, and the sequences of control and clock signals which must be generated to transfer an information along the existing I-paths.